In-Memory Computing Chips Gain Momentum
In-memory computing slashes edge-AI energy by 62 %—RRAM + ferroelectric hybrids train & infer on-chip
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Researchers focus on limiting data movement to reduce power consumption and latency in edge devices.
In popular media, “artificial intelligence” often means large language models running in expensive and power-hungry data centers. However, for many applications, small models running on local hardware are more appropriate.
Autonomous vehicles require real-time responses, avoiding data transmission delays. Medical and industrial applications often rely on sensitive data that cannot be shared with third parties. Although edge AI applications are faster and more secure, their computational resources are extremely limited. They cannot have terabyte-scale memory space or nearly unlimited computing power.
For data centers, these limitations may seem abstract, but they impose strict constraints on edge AI. In an invited paper at the 2025 IEEE International Memory Workshop and its subsequent preprint, Onur Mutlu, a professor of computer science at ETH Zurich, and his colleagues pointed out that in typical mobile workloads, data movement in memory accounts for a shocking 62% of total energy consumption. Memory is the largest consumer of hardware resources, far ahead, but memory latency is often the biggest contributor to execution time.
